CMOL FPGA circuits

This paper describes an architecture of FPGAlike fabric for future hybrid “CMOL” circuits. Such circuits will combine a semiconductor-transistor (CMOS) stack and a two-level nanowire crossbar with molecular-scale two-terminal nanodevices (programmable diodes) formed at each crosspoint. We have developed a custom set of tools for CMOL FPGA circuit design automation, and used it for the evaluation of performance of these circuits for the Toronto 20 benchmark set, so far without optimization of several parameters including the power supply voltage, nanowire pitch and maximum NOR fan-in. The results show that even without such optimization, CMOL FPGA circuits may provide a density advantage of more than two orders of magnitude over the traditional CMOS FPGA with the same CMOS design rules, at comparable time delay, acceptable power consumption, and potentially high defect tolerance.